Throughput-oriented analytical models for performance estimation on programmable hardware accelerators
Junjie Lai
Other [cs.OH]. Université de Rennes; Université européenne de Bretagne (2007-2016), 2013. English.
⟨NNT : 2013REN1S014⟩
Thèse
tel-00854019v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
MPI Code Encapsulation Using Parallel CORBA Object
Christophe René
,
Thierry Priol
[Research Report] RR-3648, INRIA. 1999
Rapport
inria-00073024v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
HArdware Volatile Entropy Gathering and Expansion: generating unpredictable random number at user level
André Seznec
,
Nicolas Sendrier
[Research Report] RR-4592, INRIA. 2002
Rapport
inria-00071993v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
A case for (partially) tagged geometric history length branch prediction
André Seznec
,
Pierre Michaud
The Journal of Instruction-Level Parallelism , 2006, 8, pp.23
Article dans une revue
hal-03408381v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
A Comprehensive Study of Dynamic Global History Branch Prediction
Pierre Michaud
,
André Seznec
[Research Report] RR-4219, INRIA. 2001
Rapport
inria-00072400v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Periodic activity migration for fast sequential execution in future heterogeneous multicore processors
Pierre Michaud
[Research Report] PI 1909, 2008, pp.20
Rapport
inria-00340566v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Matrice d'évaluation d'un système énergétique
Khaled Z. Ibrahim
,
Marie-Hélène de Sède-Marceau
3ème colloque International du Réseau Européen d'Intelligence Territoriale sous le thème " Territoire, bien-être et inclusion sociale " , Oct 2005, Liège, Belgique. http://thema.univ-fcomte.fr/IMG/jpg/03poster-energie.jpg
Communication dans un congrès
hal-00906459v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Avec Ludovic Janvier au fil du théâtre beckettien
Yann Mével
,
Martin Mégevand
Samuel Beckett et la culture française , Classiques Garnier, pp.295-313, 2019
Chapitre d'ouvrage
hal-04420142v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
A Multi-paradigm Object Oriented Parallel Environment
Jean-Marc Jézéquel
,
F. Hamelin
,
Thierry Priol
Int. Parallel Processing Symposium IPPS'94 proceedings , Apr 1994, RENNES, France
Communication dans un congrès
hal-00765360v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Extracting Threads Using Traces for System on a Chip
Eric Petit
,
François Bodin
Compilers for Parallel Computers workshop (CPC2006) , 2006, Coruna, Spain. isbn 54-609-8459-1, p. 30-44
Communication dans un congrès
hal-00420613v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
ASTEX: a Hot path Based Thread Extractor for Distributed Memory System on a Chip
Eric Petit
,
Guillaume Papaure
,
Florence Fdru@irisa.Fr Dru
,
François Bodin
1st HiPEAC Industrial Workshop , 2006, Grenoble, France. isbn 54-609-8459-1, p. 30-44
Communication dans un congrès
hal-00418708v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
A New Case for Skewed-Associativity
André Seznec
[Research Report] RR-3208, INRIA. 1997
Rapport
inria-00073481v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Efficient Support of MPI-based Parallel Codes within a CORBA-based Software Infrastructure
Thierry Priol
,
Christophe René
[Research Report] RR-3750, INRIA. 1999
Rapport
inria-00072912v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Combining Light Static Code Annotation and Instruction-Set Emulation for Flexible and Efficient On-the-fly Simulation
Thierry Lafage
,
André Seznec
[Research Report] RR-3821, INRIA. 1999
Rapport
inria-00072837v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Contention on 2nd Level Cache May Limit the Effectiveness of Simultaneous Multithreading
Sébastien Hily
,
André Seznec
[Research Report] RR-3115, INRIA. 1997
Rapport
inria-00073575v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
An Analytical Model of Temperature in Microprocessors
Pierre Michaud
,
Yiannakis Sazeides
,
André Seznec
,
Theofanis Constantinou
,
Damien Fetis
[Research Report] RR-5744, INRIA. 2005, pp.32
Rapport
inria-00070275v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Étude du parallélisme d'instructions
Erven Rohou
Autre [cs.OH]. 1994
Mémoire d'étudiant
hal-02193353v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
A PPM-like, tag-based branch predictor
Pierre Michaud
The Journal of Instruction-Level Parallelism , 2005, 7, pp.10
Article dans une revue
hal-03406188v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Periodic activity migration for fast sequential execution in future heterogeneous multicore processors
Pierre Michaud
[Research Report] RR-6735, INRIA. 2008, pp.17
Rapport
inria-00341851v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
GCDS: A Compiler Strategy for Trading Code Size Against Performance in Embedded Applications
François Bodin
,
Zbigniew Chamski
,
Christine Eisenbeis
,
Erven Rohou
,
André Seznec
[Research Report] RR-3346, INRIA. 1998
Rapport
inria-00073343v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Understanding cache attacks
Anne Canteaut
,
Cédric Lauradoux
,
André Seznec
[Research Report] RR-5881, INRIA. 2006
Rapport
inria-00071387v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Visibility Masks for Solving Complex Radiosity Computations on Multiprocessors
Bruno Arnaldi
,
Thierry Priol
,
Luc Renambot
,
Xavier Pueyo
[Research Report] RR-3008, Inria. 1996
Rapport
inria-00073686v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
CASH Design Space Exploration
Liqiang He
,
Romain Dolbeau
,
André Seznec
[Research Report] RR-5994, INRIA. 2006
Rapport
inria-00105284v3
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Don't Use the Page Number, but a Pointer on It
André Seznec
[Research Report] RR-2727, INRIA. 1995
Rapport
inria-00073967v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Évolution des gammes de processeurs MIPS, DEC Alpha, PowerPC, SPARC, x86 et PA-RISC
André Seznec
,
Thierry Lafage
[Rapport de recherche] RR-3188, INRIA. 1997
Rapport
inria-00073501v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
SVMview: a Performance Tuning Tool for DSM-based Parallel Computers
Didier Badouel
,
Thierry Priol
,
Luc Renambot
[Research Report] RR-2774, INRIA. 1996
Rapport
inria-00073918v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Extracting Speculative Threads Using Traces for System on a Chip
Eric Petit
,
François Bodin
[Research Report] PI 1789, 2005, pp.20
Rapport
inria-00000926v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Out-Of-Order Execution May Not Be Cost-Effective on Processors Featuring Simultaneous Multithreading
Sébastien Hily
,
André Seznec
[Research Report] RR-3391, INRIA. 1998
Rapport
inria-00073298v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
Méthodes d'analyse statique de pire temps d'exécution de programmes
Isabelle Puaut
,
Alexis Arnaud
Interstices , 2005
Article dans une revue
inria-00000958v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More
An Hybrid Data Transfer Optimization Technique for GPGPU
Eric Petit
,
François Bodin
,
Romain Dolbeau
Compilers for Parallel Computers workshop (CPC2007) , 2007, Lisbon, Portugal
Communication dans un congrès
hal-00418717v1
Actions
Partager
Gmail
Facebook
X
LinkedIn
More