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292 résultats
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Experimenting a Modeling Approach for Designing Organization's Strategies in the Context of Strategic AlignmentAustralian Workshop on Requirements Engineering (AWRE), Dec 2006, Adelaide, Australia. pp.1
Communication dans un congrès
halshs-00176319v1
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Extending methods to express change requirementsEngineering Methods to support information Systems Evolution (EMSISE'03), 2003, Geneva, Switzerland. pp.15
Communication dans un congrès
hal-00703613v1
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A Graphical Framework for High Performance Computing Using An MDE Approach16th Euromicro International Conference on Parallel, Distributed and network-based Processing, Feb 2008, Toulouse, France. pp.165 - 173, ⟨10.1109/PDP.2008.74⟩
Communication dans un congrès
hal-01580911v1
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Fast and Accurate Hybrid Power Estimation Methodology for Embedded SystemsThe Conference on Design and Architectures for Signal and Image Processing, Nov 2011, Tampere, Finland
Communication dans un congrès
hal-00760353v1
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Open Power and Energy Optimization Platform and Estimator (Open-People) ANR ProjectDATE 2011 - Design, Automation & Test in Europe, Mar 2011, Grenoble, France
Communication dans un congrès
hal-00650649v1
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An Example of Synchronous Design of Embedded Real-Time Systems based on IMA10th International Conference on Real-time and Embedded Computing Systems and Applications (RTCSA 2004), Aug 2004, Gothenburg, Sweden. pp.RTCSA 2004
Communication dans un congrès
hal-00541790v1
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Synchronous modeling of avionics applications using the SIGNAL language9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2003), May 2003, Toronto, Canada. pp.144-151, ⟨10.1109/RTTAS.2003.1203046⟩
Communication dans un congrès
hal-00541841v1
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Méthode de conception rapide d'architecture massivement parallèle sur puce : de la modélisation à l'expérimentation sur FPGAInformatique [cs]. Université Lille 1 Sciences et Technologies; École Nationale d'Ingénieurs de Sfax, 2010. Français. ⟨NNT : ⟩
Thèse
tel-00527894v2
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Using An MDE Approach for Modeling of Interconnection networksThe International Symposium on Parallel Architectures, Algorithms and Networks Conference (ISPAN 08), 2008, Sydney, Australia
Communication dans un congrès
inria-00565155v1
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Multi-objective Mapping for NoC ArchitectureJournal of Digital Information Management, 2007, 5 (6), pp.378--384
Article dans une revue
inria-00565156v1
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Model Driven Engineering for System-on-Chip DesignJean-Philippe Babau and Joël Champeau and Sébastien Gérard. From MDD concepts to experiments and illustrations, ISTE, Hermes science and Lavoisier, 2006, 1-905209-59-0
Chapitre d'ouvrage
inria-00565165v1
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Model Driven Engineering for SoC Co-DesignNEWCAS'05, IEEE, 2005, Québec, Canada
Communication dans un congrès
inria-00565172v1
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Parallélisation d'un code 3D Magnétostatique avec le Langage de Programmation High Performance FortranConférence Européenne sur les Méthodes Numériques en Éléctomagnétisme, NUMELEC'2000 (poster session), 2000, Poitiers, France. pp.184-185
Communication dans un congrès
inria-00565186v1
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Parallelization of a Fortran 90 Program for Electromagnetic Problems3rd Annual HPF User Group Meeting, HUG'99, 1999, Redondo Beach, CA, United States
Communication dans un congrès
inria-00565189v1
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Correct and Energy-Efficient Design of SoCs: the H.264 Encoder Case StudyInternational Symposium on System-on-Chip (SoC'2010), Sep 2010, Tampere, Finland
Communication dans un congrès
inria-00522792v1
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High level modeling of Partially Dynamically Reconfigurable FPGAs based on MDE and MARTEReconfigurable Communication-centric SoCs (ReCoSoC'08), Jul 2008, Barcelona, Spain
Communication dans un congrès
inria-00525008v1
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Modélisation des systèmes réactifs MSR 2011Abdoulaye Gamatié and Étienne Craye. Lavoisier, 45/1-3, pp.268, 2011, Journal Européen des Systèmes Automatisés
Ouvrages
hal-00849952v1
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UML 2.0 Structure Diagram for Intensive Signal Processing Application Specification[Research Report] RR-4766, INRIA. 2003
Rapport
inria-00071820v1
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Hardware/Software Exploration for an Anti-collision Radar System[Research Report] RR-5820, INRIA. 2006, pp.15
Rapport
inria-00070205v1
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Motifs pour la métamodélisation : Relation, relation Dirigée, association2006
Autre publication scientifique
hal-01214231v1
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Interoperability between Design and Simulation tools using Model Transformation techniquesFDL'03, ECSSI, Sep 2003, frankfurt, France
Communication dans un congrès
hal-01214222v1
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Abstract Clock-Based Design of a JPEG EncoderIEEE Embedded Systems Letters, 2012, 4 (2), pp.29 -32. ⟨10.1109/LES.2012.2189195⟩
Article dans une revue
hal-00758171v1
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High Level Design of adaptive distributed controller for Partial Dynamic reconfiguration in FPGAProceeding of Design and Architectures for Signal and Image Processing, DASIP 2011, Nov 2011, Tampere, Finland
Communication dans un congrès
inria-00609122v1
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A metamodel for the design of polychronous systemsJournal of Logic and Algebraic Programming, 2009, 78 (4), pp.233-259. ⟨10.1016/j.jlap.2008.11.005⟩
Article dans une revue
hal-00788580v1
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FERONOC : FLEXIBLE AND EXTENSIBLE ROUTER IMPLEMENTATION FOR DIAGONAL MESH TOPOLOGYConference on Design and Architectures for Signal and Image Processing, Nov 2011, Tampere, Finland
Communication dans un congrès
inria-00609117v1
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Neural Network Scalable Spiking SimulatorLogiciel hal-04410305v1 |
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Resource Management in Grids: Overview and a discussion of a possible approach for an Agent-Based MiddlewareSaxe-Coburg Publications, Stirlingshire, UK. PARALLEL, DISTRIBUTED AND GRID COMPUTING FOR ENGINEERING, Saxe-Coburg Publications, Stirlingshire, UK, pp 141-164, 2009, Computational Science, Engineering & Technology Series, ISSN 1759-3158. ⟨10.4203/csets.21.8⟩
Chapitre d'ouvrage
hal-00834409v1
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A Generic Tool for Tracing Executions Back to a DSML's Operational SemanticsSeventh European Conference on Modelling Foundations and Applications, Jun 2011, Birmingham, United Kingdom. pp.35-51
Communication dans un congrès
hal-00593425v1
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Propriétés de latence, fraîcheur et réactivité dans un programme synchrone multi-périodiqueApproches Formelles dans l'Assistance au Développement de Logiciels, Apr 2013, Nancy, France
Communication dans un congrès
hal-00830675v1
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Test Harness on a Preconditioned Conjugate Gradient Solver on GPUs: An Efficiency AnalysisCEFC - 2012, Nov 2012, Oita, Japan. pp.1729 - 1729, ⟨10.1109/TMAG.2013.2243830⟩
Communication dans un congrès
hal-01581063v1
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