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58 résultats
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Embedding domain-specific modeling languages into Maude specificationsSoftware and Systems Modeling, 2013, 12 (4), pp.847-869. ⟨10.1007/s10270-012-0232-5⟩
Article dans une revue
istex
hal-00660104v1
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Program Equivalence by Circular ReasoningIntegrated Formal Methods, Jun 2013, Turku, Finland. pp.362-377
Communication dans un congrès
hal-00820871v1
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A Language-Independent Proof System for Full Program EquivalenceFormal Aspects of Computing, 2016, 28 (3), pp.469--497. ⟨10.1007/s00165-016-0361-7⟩
Article dans une revue
hal-01245528v2
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A modeling front-end for seamless design and generation of context-aware Dynamically Reconfigurable Systems-on-ChipJournal of Parallel and Distributed Computing, 2018, 112, pp.1-19. ⟨10.1016/j.jpdc.2017.09.011⟩
Article dans une revue
hal-02154320v1
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G-MPSoC: Generic Massively Parallel Architecture on FPGAWSEAS Transactions on circuits and systems, 2015, 14
Article dans une revue
hal-01246675v1
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A Parallel And Scalable Multi-FPGA based Architecture for High Performance ApplicationsThe 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '15 , Feb 2015, Monterey, California, United States. ⟨10.1145/2684746.2689115⟩
Communication dans un congrès
hal-01247133v1
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Towards an Automation of the Mutation Analysis Dedicated to Model TransformationJournal of Software Testing, Verification and Reliability, 2014, pp.30. ⟨10.1002/stvr.1532⟩
Article dans une revue
hal-00988164v1
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Proving Reachability-Logic Formulas Incrementally11th International Workshop on Rewriting Logic and its Applications, Apr 2016, Eindhoven, Netherlands
Communication dans un congrès
hal-01282379v1
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Mathematical programming models for scheduling in a CPU/FPGA architecture with heterogeneous communication delaysJournal of Intelligent Manufacturing, 2018, pp.1-12. ⟨10.1007/s10845-015-1075-z⟩
Article dans une revue
hal-01247399v1
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Metamodels and MDA Transformations for Embedded Systems.Forum on specification and Design Languages, FDL 2004, Sep 2004, Lille, France. ⟨10.1007/0-387-26151-6_8⟩
Communication dans un congrès
istex
hal-00943554v1
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Master-Slave Control structure for massively parallel System on ChipDSD SEAA - 16th Euromicro Conference on Digital System Design, Sep 2013, Santander, Spain
Communication dans un congrès
hal-00906906v1
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SCAC-Net: Reconfigurable Interconnection Network in SCAC Massively parallel SoCPDP 2016 - 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, Feb 2016, Héraklion, Greece. pp.759-762, ⟨10.1109/PDP.2016.94⟩
Communication dans un congrès
hal-01246680v1
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Design exploration of efficient implementation on SoC heterogeneous platform: HEVC intra prediction applicationInternational Journal of Circuit Theory and Applications, 2016, 45 (12), pp.2243-2259. ⟨10.1002/cta.2308⟩
Article dans une revue
hal-01435190v1
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Program Equivalence by Circular Reasoning[Research Report] RR-8116, INRIA. 2013, pp.33
Rapport
hal-00744374v4
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Verifying Reachability-Logic Properties on Rewriting-Logic SpecificationsLogic, Rewriting, and Concurrency - Festschrift Symposium in Honor of José Meseguer, Sep 2015, Urbana Champaign, United States. ⟨10.1007/978-3-319-23165-5_21⟩
Communication dans un congrès
hal-01158941v1
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Heterogeneous CPU/FPGA reconfigurable computing system for avionic test applicationIEEE 27th International Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), May 2013, Cambridge, United Kingdom
Communication dans un congrès
hal-00922004v1
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Proving Partial Correctness Beyond ProgramsFROM 2017 - Working Formal Methods Symposium, Jul 2017, Bucharest, Romania. pp.1-3
Communication dans un congrès
hal-01627555v1
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Mathematical Programming Models for Scheduling in a CPU/FPGA Architecture with Communication DelayIESM'2013 - International Conference on Industrial Engineering and Systems Management - 2013, Oct 2013, Rabat, Morocco
Communication dans un congrès
hal-00922014v1
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Circuit Merging versus Dynamic Partial Reconfiguration -The HoMade Implementationi-manager's Journal on Embedded Systems(JES), 2016
Article dans une revue
hal-01245800v2
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A Generic Framework for Symbolic Execution:Theory and ApplicationsComputer Science [cs]. Alexandru Ioan Cuza, University of Iasi, 2014. English. ⟨NNT : ⟩
Thèse
tel-01094765v1
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An Efficient Framework for Power-Aware Design of Heterogeneous MPSoCIEEE Transactions on Industrial Informatics, 2013, 9 (1), pp.487-501. ⟨10.1109/TII.2012.2198657⟩
Article dans une revue
hal-00921900v1
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Méthodologie basée sur des membranes pour la gestion de la reconfiguration dynamique dans les systèmes embarqués parallèlesComPAS, Jan 2013, Grenoble, France
Communication dans un congrès
hal-00922289v1
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Programming with hardware/software functions[Research Report] RR-8835, INRIA Lille Nord Europe. 2015, pp.18
Rapport
hal-01248163v1
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Adopting New Learning Strategies for Computer Architecture in Higher Education Case Study: Building the S3 Microprocessor in 24 HoursWorkshop on Computer Architecture Education held in conjunction with the 42nd International Symposium on Computer Architeture, Jun 2015, Portland, United States
Communication dans un congrès
hal-01152144v1
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Design Space Exploration on Heterogeneous SoC: The H.264 encoder case-studyColloque GDR SOC-SIP 2013 , Jun 2013, Lyon, France. ⟨10.5802/aif.2754⟩
Communication dans un congrès
hal-01353349v1
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New MIP model for multiprocessor scheduling problem with communication delaysOptimization Letters, 2014, 11 (6), pp.1091-1107. ⟨10.1007/s11590-014-0802-2⟩
Article dans une revue
hal-01104613v1
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Pharmacokinetic tools for the dose adjustment of ciclosporin in haematopoietic stem cell transplant patients.British Journal of Clinical Pharmacology, 2014, 78 (4), pp.836-46. ⟨10.1111/bcp.12394⟩
Article dans une revue
inserm-00965397v1
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A Generic Framework for Symbolic Execution6th International Conference on Software Language Engineering, Oct 2013, Indianapolis, United States. pp.281-301
Communication dans un congrès
hal-00853588v1
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Language-Independent Program Verification Using Symbolic Execution[Research Report] RR-8369, Inria. 2014, pp.28
Rapport
hal-00864341v6
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Communication-Computation overlap in massively parallel System on Chip2014
Autre publication scientifique
hal-01104157v1
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