index - Equipe Secure and Safe Hardware Accéder directement au contenu

 

Dernières publications

Mots clés

Fault injection attack FPGA Countermeasures Computational modeling Transistors Dynamic range Field programmable gate arrays Magnetic tunneling Tunneling magnetoresistance OCaml PUF Simulation Resistance Circuit faults AES Coq Fault injection Loop PUF Reverse engineering Countermeasure Side-channel attacks SCA Side-Channel Analysis Security Aging SoC Variance-based Power Attack VPA Linearity Magnetic tunnel junction Defect modeling Internet of Things Routing Security services Lightweight cryptography SCA FDSOI Steadiness Temperature sensors Estimation Field Programmable Gates Array FPGA STT-MRAM Electromagnetic Robustness ASIC Training CRT Formal methods Side-Channel Analysis SCA Dual-rail with Precharge Logic DPL Hardware Formal proof Mutual Information Analysis MIA Masking Neural networks Intrusion detection Power demand Convolution Elliptic curve cryptography Confusion coefficient Random access memory Sécurité Spin transfer torque Hardware security Costs Information leakage Switches Cryptography TRNG GSM Masking countermeasure Side-Channel Attacks Reverse-engineering Power-constant logic Signal processing algorithms Filtering DRAM Logic gates Side-channel attack MRAM Sensors Side-channel attacks Reliability Side-channel analysis Application-specific VLSI designs Energy consumption CPA Security and privacy 3G mobile communication Machine learning Image processing Receivers Voltage Asynchronous Differential power analysis DPA RSA Writing Randomness Protocols Process variation Authentication Differential Power Analysis DPA

 

Documents avec texte intégral

211

Références bibliographiques

428

Open access

39 %

Collaborations